1. Field of the Disclosure
The present disclosure relates to a thin film transistor (TFT) having a double layered gate contact and a method of manufacturing the TFT, and more particularly, to a TFT that can prevent damage to a silicon layer under a gate electrode in a annealing process by using a first gate having high thermal resistance and a second gate having high reflectance and a method of manufacturing the TFT.
2. Description of the Related Art
FIG. 1 is a cross-sectional view illustrating a structure of a conventional TFT. Referring to FIG. 1, a conventional TFT includes a buffer layer 11 formed on a substrate 10, a silicon layer 12 formed on the buffer layer 11, a source and drain 17 and 18 respectively formed on both sides of the silicon layer 12, an insulating layer 15 formed on a center of an upper surface of the silicon layer 12, and a gate electrode 16 formed on the insulating layer 15. Also, the silicon layer 12 serves as a channel region between the source and drain 17 and 18. Therefore, to increase the mobility of charge in the channel region, after amorphous silicon is formed on the buffer layer 11, the amorphous silicon is crystallized to form the silicon layer.
The source 17 and the drain 18 are formed by doping the sides 13 and 14 of the crystallized silicon layer 12 with dopants. An ion implanting method that forcibly implants ionized atoms into silicon by accelerating the ionized atoms is mainly used to achieve the implantation of a dopant into the source and drain regions. However, when the ion implanting method used for doping a dopant, crystal defects are generated in the silicon crystal lattices due to the dopant being implanted into the silicon. Therefore, an annealing process is required to electrically activate the doped region by removing the crystal defects and matching a lattice of silicon with that of the dopants.
FIG. 2 is a cross-sectional view illustrating an annealing process using a laser beam. Referring to FIG. 2, when a laser beam is radiated from a laser, such as an excimer laser, to an upper surface of a TFT, the exposed doped regions 13 and 14 are heated by the laser beam. When a laser beam is used for annealing, annealing can be performed even at room temperature since the laser beam directly heats the doped regions 13 and 14. Therefore, when annealing is performed using a laser beam, a material that has a low heat tolerance, such as plastic, may be used to form the substrate.
In an annealing process using a laser beam, the gate electrode 16 serves as a mask that blocks the laser beam so as not to irradiate to the silicon layer 12. To prevent the silicon layer 12 from being damaged by the laser beam, it is preferable that the gate electrode 16 completely reflects the laser beam. However, the gate electrode 16 is usually formed of chrome Cr, and chrome has relatively low reflectance and absorbs thermal energy. Therefore, the gate electrode 16 formed of chrome absorbs the thermal energy of the laser beam and transmits the thermal energy to the insulating layer 15 and the silicon layer 12, which are formed below the gate electrode, while annealing the doping regions 13 and 14.
As a result, as depicted in FIG. 3, the insulating layer 15 and the silicon layer 12 partly melts. FIG. 3 is a SEM image of a TFT from which the gate electrode 16 is removed after annealing. In FIG. 3, a trace of the gate electrode 16 in a rectangular shape was left, and the insulating layer 15 and the silicon layer 12 formed under the gate electrode 16 partly melted. As a result, the gate electrode 16 and the silicon layer 12 may not be completely insulated from each other and the charge mobility of a channel region between the source and drain 17 and 18 may greatly decrease due to the deformation of the silicon layer 12.